# GPU detection deactivated, how to reactivate it? **URL:** \ **Category:** User discussions\ **Created:** [June 16, 2020, 7:57pm UTC](https://gromacs.bioexcel.eu/t/gpu-detection-deactivated-how-to-reactivate-it/321 "2020-06-16T19:57:26Z")\ **Posts on this page:** 1\ **Page:** 1
**Author:** ![Asghar](https://dub1.discourse-cdn.com/flex017/user_avatar/gromacs.bioexcel.eu/asghar/32/149_2.png) [@Asghar](https://gromacs.bioexcel.eu/u/Asghar)\ **Post date:** [June 16, 2020, 7:57pm UTC](https://gromacs.bioexcel.eu/t/gpu-detection-deactivated-how-to-reactivate-it/321/1 "2020-06-16T19:57:26Z")
GROMACS version: 2020.2 GROMACS modification: Yes/No When I run mdrun the program does not use available GPU presumably because GPU detection is deactivated. How can I reactivate GPU detection? Here is the md.log file contents: GROMACS: gmx mdrun, version 2020.2 Executable: /home/asghar/programs/build\_gromacs/bin/gmx Data prefix: /home/asghar/programs/build\_gromacs Working dir: /home/asghar/test\_gmx/12\_14/0001 Process ID: 18667 Command line: gmx mdrun -v -nt 4 -s equil\_0001.tpr -c conf\_solvated\_equilibrated\_0001.gro GROMACS version: 2020.2 Verified release checksum is 3f718d436b1ac2d44ce97164df8a13322fc143498ba44eccfd567e20d8aaea1d Precision: single Memory model: 64 bit MPI library: thread\_mpi OpenMP support: enabled (GMX\_OPENMP\_MAX\_THREADS = 64) GPU support: CUDA SIMD instructions: AVX2\_256 FFT library: fftw-3.3.8-sse2-avx-avx2-avx2\_128 RDTSCP usage: enabled TNG support: enabled Hwloc support: hwloc-1.11.0 Tracing support: disabled C compiler: /home/asghar/programs/my\_gcc/gcc\_9/gcc-9-20200612/bin/gcc GNU 9.3.1 C compiler flags: -mavx2 -mfma -fexcess-precision=fast -funroll-all-loops -O3 -DNDEBUG C++ compiler: /home/asghar/programs/my\_gcc/gcc\_9/gcc-9-20200612/bin/g++ GNU 9.3.1 C++ compiler flags: -mavx2 -mfma -fexcess-precision=fast -funroll-all-loops -fopenmp -O3 -DNDEBUG CUDA compiler: /home/asghar/programs/cuda\_tools/bin/nvcc nvcc: NVIDIA ® Cuda compiler driver;Copyright © 2005-2020 NVIDIA Corporation;Built on Wed\_May\_\_6\_19:09:25\_PDT\_2020;Cuda compilation tools, release 11.0, V11.0.167;Build cuda\_11.0\_bu.TC445\_37.28358933\_0 CUDA compiler flags:-std=c++14;-gencode;arch=compute\_30,code=sm\_30;-gencode;arch=compute\_35,code=sm\_35;-gencode;arch=compute\_37,code=sm\_37;-gencode;arch=compute\_50,code=sm\_50;-gencode;arch=compute\_52,code=sm\_52;-gencode;arch=compute\_60,code=sm\_60;-gencode;arch=compute\_61,code=sm\_61;-gencode;arch=compute\_70,code=sm\_70;-gencode;arch=compute\_35,code=compute\_35;-gencode;arch=compute\_50,code=compute\_50;-gencode;arch=compute\_52,code=compute\_52;-gencode;arch=compute\_60,code=compute\_60;-gencode;arch=compute\_61,code=compute\_61;-gencode;arch=compute\_70,code=compute\_70;-gencode;arch=compute\_75,code=compute\_75;-use\_fast\_math;;-mavx2 -mfma -fexcess-precision=fast -funroll-all-loops -fopenmp -O3 -DNDEBUG CUDA driver: 10.20 CUDA runtime: N/A Running on 1 node with total 4 cores, 8 logical cores **(GPU detection deactivated)** Hardware detected: CPU info: Vendor: Intel Brand: Intel® Xeon® CPU E5-2686 v4 @ 2.30GHz Family: 6 Model: 79 Stepping: 1 Features: aes apic avx avx2 clfsh cmov cx8 cx16 f16c fma hle htt intel lahf mmx msr nonstop\_tsc pcid pclmuldq pdpe1gb popcnt pse rdrnd rdtscp rtm sse2 sse3 sse4.1 sse4.2 ssse3 tdt x2apic Hardware topology: Full, with devices Sockets, cores, and logical processors: Socket 0: [0 4] [1 5] [2 6] [3 7] Numa nodes: Node 0 (64215793664 bytes mem): 0 1 2 3 4 5 6 7 Latency: 0 0 1.00 Caches: L1: 32768 bytes, linesize 64 bytes, assoc. 8, shared 2 ways L2: 262144 bytes, linesize 64 bytes, assoc. 8, shared 2 ways L3: 47185920 bytes, linesize 64 bytes, assoc. 20, shared 8 ways PCI devices: 0000:00:01.1 Id: 8086:7010 Class: 0x0101 Numa: 0 0000:00:02.0 Id: 1013:00b8 Class: 0x0300 Numa: 0 0000:00:03.0 Id: 1d0f:ec20 Class: 0x0200 Numa: 0 0000:00:1e.0 Id: 10de:1db1 Class: 0x0302 Numa: 0 ++++ PLEASE READ AND CITE THE FOLLOWING REFERENCE ++++ M. J. Abraham, T. Murtola, R. Schulz, S. Páll, J. C. Smith, B. Hess, E. Lindahl GROMACS: High performance molecular simulations through multi-level parallelism from laptops to supercomputers SoftwareX 1 (2015) pp. 19-25 -------- -------- — Thank You — -------- -------- Thank you, Asghar